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- 2
- 40: 0d00 *= $0d00
- 50: 0d00 .opt p2
- 60: 0d00 z1 = $fb
- 70: 0d00 vdcadr = $d600 ; entry-point to 80-columns
- 80: 0d00 vdcdat = $d601 ; data to read or write to the internal register
- 90: 0d00 bitmap = $2000 ; where the 40-column bitmap lives
- 100: 0d00 4c 09 0d jmp hron ; turn on hi-res
- 110: 0d03 4c 18 0d jmp copy ; copy 40-column to 80
- 120: 0d06 4c a9 0d jmp hroff ; turn off hi-res
- ;
- 140: 0d09 hron = *
- 150: 0d09 a2 19 ldx #25
- 150: 0d0b 20 91 0d jsr re80 ; read reg 25, which controls hi-res
- 160: 0d0e 29 3f and #63
- 160: 0d10 09 80 ora #128 ; bit 6 off and 7 on
- 170: 0d12 a2 19 ldx #25
- 170: 0d14 20 9d 0d jsr wr80 ; hi-res on
- 180: 0d17 60 rts ; end of hron
- ;
- 200: 0d18 copy = *
- 210: 0d18 a9 00 lda #0
- 210: 0d1a a2 12 ldx #18
- 210: 0d1c 20 9d 0d jsr wr80
- 210: 0d1f e8 inx
- 210: 0d20 20 9d 0d jsr wr80 ; set up address $0000 (80-col bitmap)
- 220: 0d23 a9 00 lda #<bitmap
- 220: 0d25 85 fb sta z1
- 220: 0d27 a9 20 lda #>bitmap
- 220: 0d29 85 fc sta z1+1 ; z1 points to 40-col bitmap
- 230: 0d2b a9 19 lda #25
- 230: 0d2d 8d bb 0d sta lines ; copy 25 lines of 8 pixels
- 240: 0d30 a9 28 loop lda #40
- 240: 0d32 8d bc 0d sta columns ; 40 columns
- 250: 0d35 a0 00 inloop ldy #0
- 250: 0d37 b1 fb lda (z1),y
- 250: 0d39 8d bd 0d sta work ; get a byte (8 pixels)
- 260: 0d3c 20 75 0d jsr expand ; expand to 16 pixels and send it over to 80-col screen
- 270: 0d3f a5 fb lda z1
- 270: 0d41 18 clc
- 270: 0d42 69 08 adc #8
- 270: 0d44 85 fb sta z1
- 270: 0d46 a9 00 lda #0
- 270: 0d48 65 fc adc z1+1
- 270: 0d4a 85 fc sta z1+1 ; add 8 to z1
- 280: 0d4c ce bc 0d dec columns
- 280: 0d4f d0 e4 bne inloop ; continue for 40 columns
- 290: 0d51 a5 fb lda z1
- 290: 0d53 29 07 and #7
- 290: 0d55 c9 07 cmp #7
- 290: 0d57 f0 0f beq newlump
- 300: 0d59 a5 fb lda z1
- 300: 0d5b 38 sec
- 300: 0d5c e9 3f sbc #<319
- 300: 0d5e 85 fb sta z1
- 300: 0d60 a5 fc lda z1+1
- 300: 0d62 e9 01 sbc #>319
- 300: 0d64 85 fc sta z1+1
- 300: 0d66 d0 c8 bne loop
- 310: 0d68 a5 fb newlump lda z1
- 310: 0d6a 38 sec
- 310: 0d6b e9 07 sbc #7
- 310: 0d6d 85 fb sta z1
- 320: 0d6f ce bb 0d dec lines
- 320: 0d72 d0 bc bne loop
- 330: 0d74 60 rts ; end of copy
- ;
- 350: 0d75 expand = *
- 360: 0d75 20 78 0d jsr doit ; do this twice, so jsr to the next line
- ; when the jsr ends, the doit routine is repeated
- 380: 0d78 a2 04 doit ldx #4 ; translate four bits
- 390: 0d7a 2e bd 0d dlp1 rol work
- 390: 0d7d 08 php
- 390: 0d7e ca dex
- 390: 0d7f d0 f9 bne dlp1 ; rol 4 times and push (for carry)
- 400: 0d81 a2 04 ldx #4 ; now pull them back
- 410: 0d83 28 dlp2 plp
- 410: 0d84 08 php
- 410: 0d85 6a ror
- 410: 0d86 28 plp
- 410: 0d87 6a ror
- 410: 0d88 ca dex
- 410: 0d89 d0 f8 bne dlp2 ; the carry rotates into .a
- 420: 0d8b a2 1f ldx #31 ; 80-col write register
- 430: 0d8d 20 9d 0d jsr wr80 ; send it along to the vdc
- 440: 0d90 60 rts ; double rts
- ;
- 460: 0d91 8e 00 d6 re80 stx vdcadr ; re80 reads the 80-col chip
- 470: 0d94 2c 00 d6 relp bit vdcadr
- 470: 0d97 10 fb bpl relp
- 470: 0d99 ad 01 d6 lda vdcdat
- 470: 0d9c 60 rts
- ;
- 490: 0d9d 8e 00 d6 wr80 stx vdcadr ; wr80 writes to the 80-col chip
- 500: 0da0 2c 00 d6 wrlp bit vdcadr
- 500: 0da3 10 fb bpl wrlp
- 500: 0da5 8d 01 d6 sta vdcdat
- 500: 0da8 60 rts
- ;
- 520: 0da9 a2 19 hroff ldx #25
- 520: 0dab 20 91 0d jsr re80 ; turn off the hi-res screen
- 530: 0dae 29 7f and #127
- 530: 0db0 09 40 ora #64
- 530: 0db2 a2 19 ldx #25
- 530: 0db4 20 9d 0d jsr wr80
- 540: 0db7 20 62 ff jsr $ff62 ; restore characters
- 550: 0dba 60 rts ; end of hroff
- 560: 0dbc lines *= *+1 ; variables
- 570: 0dbd columns *= *+1
- 580: 0dbe work *= *+1
-